This is a simple digital logic simulator with nominal gate delays.
For available gate types, note the program logic.c - it is easy to
add new gates after seeing this template. The form of the input file 
for 'logic' is:

#-of-gates output-gate time-for-simulation
#-of-gate1 gate-type delay input-1 input-2 ... #-of-outputs out-1 out-2 ...
#-of-gate2 gate-type delay input-1 input-2 ... #-of-outputs out-1 out-2 ...
...

If there are zero inputs, leave the input part of the input record blank.
The program (logic.c) specifies the # of inputs for each type of gate
whereas the number of outputs is arbitrary.
