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#ifndef GMX_SIMD_IMPL_ARM_NEON_ASIMD_SIMD4_FLOAT_H
#define GMX_SIMD_IMPL_ARM_NEON_ASIMD_SIMD4_FLOAT_H

#include "config.h"

#include <arm_neon.h>

#include <cassert>
#include <cstddef>

namespace gmx
{

class Simd4Float
{
public:
    Simd4Float() {}

    Simd4Float(float f) : simdInternal_(vdupq_n_f32(f)) {}

    // Internal utility constructor to simplify return statements
    Simd4Float(float32x4_t simd) : simdInternal_(simd) {}

    float32x4_t simdInternal_;
};

class Simd4FBool
{
public:
    Simd4FBool() {}

    //! \brief Construct from scalar bool
    Simd4FBool(bool b) : simdInternal_(vdupq_n_u32(b ? 0xFFFFFFFF : 0)) {}

    // Internal utility constructor to simplify return statements
    Simd4FBool(uint32x4_t simd) : simdInternal_(simd) {}

    uint32x4_t simdInternal_;
};

static inline Simd4Float gmx_simdcall load4(const float* m)
{
    assert(size_t(m) % 16 == 0);
    return { vld1q_f32(m) };
}

static inline void gmx_simdcall store4(float* m, Simd4Float a)
{
    assert(size_t(m) % 16 == 0);
    vst1q_f32(m, a.simdInternal_);
}

static inline Simd4Float gmx_simdcall load4U(const float* m)
{
    return { vld1q_f32(m) };
}

static inline void gmx_simdcall store4U(float* m, Simd4Float a)
{
    vst1q_f32(m, a.simdInternal_);
}

static inline Simd4Float gmx_simdcall simd4SetZeroF()
{
    return { vdupq_n_f32(0.0F) };
}

static inline Simd4Float gmx_simdcall operator&(Simd4Float a, Simd4Float b)
{
    return { vreinterpretq_f32_s32(vandq_s32(vreinterpretq_s32_f32(a.simdInternal_),
                                             vreinterpretq_s32_f32(b.simdInternal_))) };
}

static inline Simd4Float gmx_simdcall andNot(Simd4Float a, Simd4Float b)
{
    return { vreinterpretq_f32_s32(vbicq_s32(vreinterpretq_s32_f32(b.simdInternal_),
                                             vreinterpretq_s32_f32(a.simdInternal_))) };
}

static inline Simd4Float gmx_simdcall operator|(Simd4Float a, Simd4Float b)
{
    return { vreinterpretq_f32_s32(vorrq_s32(vreinterpretq_s32_f32(a.simdInternal_),
                                             vreinterpretq_s32_f32(b.simdInternal_))) };
}

static inline Simd4Float gmx_simdcall operator^(Simd4Float a, Simd4Float b)
{
    return { vreinterpretq_f32_s32(veorq_s32(vreinterpretq_s32_f32(a.simdInternal_),
                                             vreinterpretq_s32_f32(b.simdInternal_))) };
}

static inline Simd4Float gmx_simdcall operator+(Simd4Float a, Simd4Float b)
{
    return { vaddq_f32(a.simdInternal_, b.simdInternal_) };
}

static inline Simd4Float gmx_simdcall operator-(Simd4Float a, Simd4Float b)
{
    return { vsubq_f32(a.simdInternal_, b.simdInternal_) };
}

static inline Simd4Float gmx_simdcall operator-(Simd4Float x)
{
    return { vnegq_f32(x.simdInternal_) };
}

static inline Simd4Float gmx_simdcall operator*(Simd4Float a, Simd4Float b)
{
    return { vmulq_f32(a.simdInternal_, b.simdInternal_) };
}

static inline Simd4Float gmx_simdcall rsqrt(Simd4Float x)
{
    return { vrsqrteq_f32(x.simdInternal_) };
}

static inline Simd4Float gmx_simdcall abs(Simd4Float x)
{
    return { vabsq_f32(x.simdInternal_) };
}

static inline Simd4Float gmx_simdcall max(Simd4Float a, Simd4Float b)
{
    return { vmaxq_f32(a.simdInternal_, b.simdInternal_) };
}

static inline Simd4Float gmx_simdcall min(Simd4Float a, Simd4Float b)
{
    return { vminq_f32(a.simdInternal_, b.simdInternal_) };
}

static inline void gmx_simdcall transpose(Simd4Float* v0, Simd4Float* v1, Simd4Float* v2, Simd4Float* v3)
{
    float32x4x2_t t0  = vuzpq_f32(v0->simdInternal_, v2->simdInternal_);
    float32x4x2_t t1  = vuzpq_f32(v1->simdInternal_, v3->simdInternal_);
    float32x4x2_t t2  = vtrnq_f32(t0.val[0], t1.val[0]);
    float32x4x2_t t3  = vtrnq_f32(t0.val[1], t1.val[1]);
    v0->simdInternal_ = t2.val[0];
    v1->simdInternal_ = t3.val[0];
    v2->simdInternal_ = t2.val[1];
    v3->simdInternal_ = t3.val[1];
}

static inline Simd4FBool gmx_simdcall operator==(Simd4Float a, Simd4Float b)
{
    return { vceqq_f32(a.simdInternal_, b.simdInternal_) };
}

static inline Simd4FBool gmx_simdcall operator!=(Simd4Float a, Simd4Float b)
{
    return { vmvnq_u32(vceqq_f32(a.simdInternal_, b.simdInternal_)) };
}

static inline Simd4FBool gmx_simdcall operator<(Simd4Float a, Simd4Float b)
{
    return { vcltq_f32(a.simdInternal_, b.simdInternal_) };
}

static inline Simd4FBool gmx_simdcall operator<=(Simd4Float a, Simd4Float b)
{
    return { vcleq_f32(a.simdInternal_, b.simdInternal_) };
}

static inline Simd4FBool gmx_simdcall operator&&(Simd4FBool a, Simd4FBool b)
{
    return { vandq_u32(a.simdInternal_, b.simdInternal_) };
}

static inline Simd4FBool gmx_simdcall operator||(Simd4FBool a, Simd4FBool b)
{
    return { vorrq_u32(a.simdInternal_, b.simdInternal_) };
}

static inline Simd4Float gmx_simdcall selectByMask(Simd4Float a, Simd4FBool m)
{
    return { vreinterpretq_f32_u32(vandq_u32(vreinterpretq_u32_f32(a.simdInternal_), m.simdInternal_)) };
}

static inline Simd4Float gmx_simdcall selectByNotMask(Simd4Float a, Simd4FBool m)
{
    return { vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(a.simdInternal_), m.simdInternal_)) };
}

static inline Simd4Float gmx_simdcall blend(Simd4Float a, Simd4Float b, Simd4FBool sel)
{
    return { vbslq_f32(sel.simdInternal_, b.simdInternal_, a.simdInternal_) };
}

static inline Simd4Float gmx_simdcall fma(Simd4Float a, Simd4Float b, Simd4Float c)
{
    return { vfmaq_f32(c.simdInternal_, b.simdInternal_, a.simdInternal_) };
}

static inline Simd4Float gmx_simdcall fms(Simd4Float a, Simd4Float b, Simd4Float c)
{
    return { vnegq_f32(vfmsq_f32(c.simdInternal_, b.simdInternal_, a.simdInternal_)) };
}

static inline Simd4Float gmx_simdcall fnma(Simd4Float a, Simd4Float b, Simd4Float c)
{
    return { vfmsq_f32(c.simdInternal_, b.simdInternal_, a.simdInternal_) };
}

static inline Simd4Float gmx_simdcall fnms(Simd4Float a, Simd4Float b, Simd4Float c)
{
    return { vnegq_f32(vfmaq_f32(c.simdInternal_, b.simdInternal_, a.simdInternal_)) };
}

static inline Simd4Float gmx_simdcall round(Simd4Float x)
{
    return { vrndnq_f32(x.simdInternal_) };
}

static inline Simd4Float gmx_simdcall trunc(Simd4Float x)
{
    return { vrndq_f32(x.simdInternal_) };
}

static inline bool gmx_simdcall anyTrue(Simd4FBool a)
{
    return (vmaxvq_u32(a.simdInternal_) != 0);
}

static inline float gmx_simdcall reduce(Simd4Float a)
{
    float32x4_t b = a.simdInternal_;
    b             = vpaddq_f32(b, b);
    b             = vpaddq_f32(b, b);
    return vgetq_lane_f32(b, 0);
}

static inline float gmx_simdcall dotProduct(Simd4Float a, Simd4Float b)
{
    Simd4Float c;

    c = a * b;
    /* set 4th element to 0, then add all of them */
    c.simdInternal_ = vsetq_lane_f32(0.0F, c.simdInternal_, 3);
    return reduce(c);
}

} // namespace gmx

#endif // GMX_SIMD_IMPL_ARM_NEON_ASIMD_SIMD4_FLOAT_H
