Using the Electric VLSI Design System

# Chapter X: SIMULATION

| ## 1: Introduction to Simulation |

Electric has a built-in gate-level simulator called ALS (the Asynchronous Logic Simulator) that can simulate schematics, IC layout, or VHDL descriptions. In addition, Electric can produce input decks for many external simulators. This chapter describes the built-in simulator. For more information about the simulation interfaces, see section 9-4.

For an example of simulation, open the library file "samples.txt" and edit the facet "tool-SimulateALS" (you can read the library with the Readable Dump subcommand of the Import command of the File menu). Then just issue the Simulate... subcommand of the Simulation command of the Tools menu.

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