Using the Electric VLSI Design System

Chapter IX: TOOLS

| ## 3: Electrical-Rule Checking |

The electrical-rule checker (ERC) is a collection of tools for checking a circuit's behavior without simulation. Currently, the only check that is done is the Substrate and Well areas of a CMOS chip.

To run the ERC, use the Analyze Substrate and Well subcommand of the Electrical Rules command of the Tools menu. This may take some time, and if it takes too long, you can abort it with the interrupt key (see section 1-9).

After analysis is done, you can review the errors by typing:

- ">" to see the next error
- "<" to see the previous error
- "&" to repeat the current error

The Electrical Rules Checker makes sure that there are substrate and well contacts in every area of substrate and well. You can relax this restriction with the ERC Options... command. This command allows you to request that there be only 1 substrate or well contact, anywhere on the chip. You can also instruct the ERC to ignore contacts entirely. |

The ERC also checks spacing rules between well and substrate areas. Although this is generally the domain of the Design Rule Checker, it is not done there, so it is done here.

Finally, the ERC reports the maximum distance from a well or substrate contact to any point on the well or substrate. This is useful when making sure that there are sufficient contacts for each area.

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