// SV - Symbolic Vector Hardware Analysis Framework
// Copyright (C) 2014-2015 Centaur Technology
//
// Contact:
//   Centaur Technology Formal Verification Group
//   7600-C N. Capital of Texas Highway, Suite 300, Austin, TX 78731, USA.
//   http://www.centtech.com/
//
// License: (An MIT/X11-style license)
//
//   Permission is hereby granted, free of charge, to any person obtaining a
//   copy of this software and associated documentation files (the "Software"),
//   to deal in the Software without restriction, including without limitation
//   the rights to use, copy, modify, merge, publish, distribute, sublicense,
//   and/or sell copies of the Software, and to permit persons to whom the
//   Software is furnished to do so, subject to the following conditions:
//
//   The above copyright notice and this permission notice shall be included in
//   all copies or substantial portions of the Software.
//
//   THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
//   IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
//   FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
//   AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
//   LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
//   FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
//   DEALINGS IN THE SOFTWARE.
//
// Original author:  Sol Swords <sswords@centtech.com>

This file contains a list of all the cosim tests, and should
eventually contain, for each one, a short summary saying what
feature(s) it is intended to exercise.

alias1 - 
alias2 - 
alias3 - 
alias4 - 
alias5 - 
always1 - 
always2 - 
arrays - 
assignpatparam - 
assignpats - 
bigcase - 
bin_ashl - 
bin_ashr - 
bin_bitand - 
bin_bitor - 
bin_bitxnor - 
bin_bitxnor2 - 
bin_bitxor - 
bin_ceq - 
bin_cne - 
bin_div - 
bin_eq - 
bin_equiv - 
bin_gt - 
bin_gte - 
bin_implies - 
bin_inside1 - 
bin_inside2 - 
bin_inside3 - 
bin_inside4 - 
bin_logand - 
bin_logor - 
bin_lt - 
bin_lte - 
bin_minus - 
bin_neq - 
bin_plus - 
bin_pow_ncv - 
bin_pow_vcs - 
bin_rem - 
bin_shl - 
bin_shr - 
bin_times - 
bin_wildeq - 
bin_wildneq - 
buf - 
casestmt - 
casts1 - 
colon-comment - 
dynwrite - 
elab - 
enum - 
extint - 
fns - 
fns2 - 
for-integer - 
for-nba - 
for-nested-if - 
gates - 
gates_and - 
gates_arr1 - 
gates_buf - 
gates_bufif0 - 
gates_bufif1 - 
gates_cmos - 
gates_nand - 
gates_nmos - 
gates_nor - 
gates_not - 
gates_notif0 - 
gates_notif1 - 
gates_or - 
gates_pmos - 
gates_pulldown - 
gates_pullup - 
gates_rnmos - 
gates_rpmos - 
gates_wideand - 
gates_widebuf - 
gates_widenand - 
gates_widenor - 
gates_widenot - 
gates_wideor - 
gates_widexnor - 
gates_widexor - 
gates_xnor - 
gates_xor - 
generate - 
generate2 - 
generate3 - 
generate4 - 
generate5 - 
generate6 - 
generate7 - 
genimplicit - 
genloop - 
globalenum - 
globalimport - 
iface_basic - 
iface_basic2 - 
iface_basic3 - 
iface_basic4 - 
iface_basic5 - 
iface_basic6 - 
iface_gen - 
iface_gen2 - 
iface_nonansi - 
iface_subiface - 
ifaceport - 
ifarray1 - instance array of interfaces passed to modinst array
ifarray2 - instance array of interfaces passed in parts to modinst arrays
ifarray3 - instance array of interfaces passed to single modinst where module has matching interfaceport array
ifarray4 - single interface instance replicated across modinst array
implicitparam - 
implicitparam2 - 
inst_arr - 
inst_size1 - 
inst_size2 - 
inst_size3 - 
inst_size4 - 
koggestone - 
nested - 
param - 
paraminst - 
paramtypes - 
paramtypes2 - 
pkgfns - 
pluscolon - 
popcnt - 
portsize - 
ranges - 
regfile - 
shuf - 
simpleparam - 
sizecast - 
slicewrite - 
stmt_for - 
stmt_if - 
stmt_if2 - 
stmtlocals - 
stmtlocals2 - 
stream - 
stream2 - 
stream3 - 
structs - 
sysfun - 
task - 
task2 - 
typeparam - 
typeres - 
typescope - 
udp1 - 
udp_wide1 - 
un_bitand - 
un_bitnand - 
un_bitnor - 
un_bitnot - 
un_bitor - 
un_bitxnor - 
un_bitxor - 
un_lognot - 
un_minus - 
un_plus - 
unpackedassign - 
unpackedport - 
unpackedrange - 
wildeq - 
