This README file is structured like a FAQ (Frequently Asked Questions)
document. You should read it entirely before proceeding to the
installation of the whole set of programs. This file contains the basic
pointers to the different documents or manuals found in this release. 

Question 0: What is ALLIANCE ?
------------------------------

You can read a general description of the ALLIANCE system and tools by
printing the PostScript file OVERVIEW.ps in the root directory:

> lpr OVERVIEW.ps

A smaller explanation is given in the ALLIANCE.NEW file:

> more ALLIANCE.NEW 
  
Question 1: What is ALLIANCE general copyright policy ?
-------------------------------------------------------

The CAO-VLSI team at MASI follows the general copyright policy defined
by the Free Software Foundation. You can read the ALLIANCE general public
license by issuing:

> more ALLIANCE.COPYING 

Question 2: How to install ALLIANCE ?
-------------------------------------

Two kinds of distributions are provided : source and binary.

To install the whole ALLIANCE CAD Framework from the source distribution,
please do the following command in the current directory:

> make all 

If you wish to install a standalone ALLIANCE tool, please do 

> make install-<tool>

where <tool> is the name of the tool you want. For example, if you just
want to use asimut, the VHDL compiler/simulator, just type:

> make install-asimut
 
Here is the list of the available tools

> make install-asimut            /* logic VHDL simulator */
> make install-genpat            /* pattern description */
> make install-genlib            /* netlist capture */
> make install-scr               /* standard cell router */
> make install-ring              /* core to pads router */
> make install-s2r               /* symbolic to real converter */
> make install-versatil          /* design rule checker */
> make install-lynx              /* netlist extractor */
> make install-lvx               /* netlist comparator */
> make install-desb              /* functional abstractor */
> make install-proof             /* formal prover */
> make install-sl                /* logic synthesis */
> make install-alc               /* symbolic layout editor */

You may also wish to have a convenient environment. To get it, just enter:

> source CSHRC.alliance
> source LOGIN.alliance 

If anything goes wrong, especially with tool alc, please consult
the top of file Makefile and set environment variables appropriately.


To install the whole ALLIANCE CAD Framework from a binary distribution,
please do the following command in the current directory:

as root do
> ln -s `pwd` /alliance

(alliance is compiled to expect its datafiles in /alliance/etc ...)
You can also override this by using environment variables. See Q4.
You will find the binaries distributions under 'binaries' on ftp-servers.

Question 3: How to get started ?
--------------------------------

You can find a tutorial describing the design and implementation of the
AMD2901 microprocessor, from the VHDL specification to the GDSII mask
layout in the tutorials directory:

> cd tutorials/AMD2901 

The PostScript file relative to this tutorial is tutorial.ps
Feel free to print it. 

There is also another tutorial in tutorials/ADDACCU.
This tutorial is much smaller than the first one, but gives an other
view of the ALLIANCE capabilities.

> cd tutorials/ADDACCU

You should run there the batch file called tutorial.


Question 4: How to enter the ALLIANCE CAD system ?
--------------------------------------------------

ALLIANCE is a set of tools that can be used independently from each other. Each
ALLIANCE tool can be executed from the UNIX shell. Nevertheless A consistent 
design-flow is described in the file tutorials/AMD2901/tutorial.ps that 
details the complete generation of the AMD2901 chip.
Before proceeding to the execution of tools, several environment variables
must be defined. For further documentation:

> man environ 

Question 5: What is exactly the supported VHDL subset ?
-------------------------------------------------------

You can find a general presentation of the VHDL subset by issuing the following
commands:

> man vhdl 

This gives you an hint about the supported VHDL subset.

You can have a detailed description of the supported subset with:

> man vbe 

This gives you the behavioral subset handled by asimut.

> man vst

This gives you the structural subset handled by asimut.

Question 6: What is the available online documentation ?
--------------------------------------------------------

1) tools
--------

> man asimut            /* logic VHDL simulator */
> man genpat            /* pattern description */
> man genlib            /* netlist capture */
> man scr               /* standard cell router */
> man ring              /* core to pads router */
> man s2r               /* symbolic to real converter */
> man versatil          /* design rule checker */
> man lynx              /* netlist extractor */
> man lvx               /* netlist comparator */
> man desb              /* functional abstractor */
> man proof             /* formal prover */
> man logic             /* logic synthesis */
> man alc               /* symbolic layout editor */

2) libraries
------------

> man catal              /* catalog */
> man sclib              /* standard cells library */
> man padlib             /* pad library */

3) formats
----------

> man vhdl               /* VHDL overview */
> man vbe                /* behavioral view */
> man vst                /* structural view */
> man al                 /* internal ALLIANCE netlist */
> man ap                 /* internal ALLIANCE symbolic layout */
> man pat                /* internal ALLIANCE pattern description */

4) miscellaneous
----------------

> man environ            /* about environment variables */
> man prol               /* technology file */


Question 7:  Where are defined the symbolic layout rules ?
-----------------------------------------------------

The symbolic layout rules are specified in the Design Rule Checker
documentation:
$man versatil

Question 8:  How is performed the mapping from the symbolic layout to a target process ?
----------------------------------------------------------------------------------------

The actual conversion is performed by the s2r tool:

> man s2r 

Question 9:  How can I get a paper documentation ?
--------------------------------------------------


You can print the whole ALLIANCE tool documentation by issuing the
following commands:

> cd doc
> PRINT_TOOL_DOC lw

where 'lw' is the name of your printer.
Documentation is about 150 pages.

You can print the whole ALLIANCE cells documentation by issuing the
following commands:

> cd doc
> PRINT_CELLS_DOC lw

where 'lw' is the name of your printer.

Question 10:  Where are the predefined libraries ?
--------------------------------------------------

Please use:

> man catal

For more information of the Standard Cell library, please do:

> man sclib

For more information of the Pad Cell library, please do:

> man padlib

Question 11: Can I have documentation about ALLIANCE internals formats ?
------------------------------------------------------------------------

The netlist file format is al. Please use the following command:

> man al 

The symbolic layout file format is ap. Please use the following command:

> man ap 

The pattern file format is pat. Please use the following command:

> man pat 

Question 12: How can I get in touch with you ?
----------------------------------------------

Please use the following mail adresses.
       cao-vlsi@masi.ibp.fr
This will reach all the team that has built Alliance.

If you like to reach all the interested users of Alliance, use:
       alliance@masi.ibp.fr
BE CAREFUL ! This will reach all the users of Alliance through the world.
You can subscribe or unsubscribe to this mailing-list of registered users
of Alliance in the world by sending a mail to
       alliance-request@masi.ibp.fr

       You may get ALLIANCE by two distinct means:
                1) by anonymous FTP
                2) by sending a blank tape (we can write DC 600A 60Megs,
DC6150 150Megs, and ExaByte 8mm 2,3 Gigas) with your complete affiliation
to the following address:

                   Laboratoire MASI/CAO-VLSI
                   Tour 55-65, 2eme etage, Porte 13
                   Universite Pierre et Marie Curie (PARIS VI)
                   4, place Jussieu 75252 PARIS Cedex 05
                   FRANCE



                                        MASI/CAO-VLSI CAD Team

        --------------------------------------------------------------------
        | Our complete address is:                                         |
        |   Laboratoire MASI/CAO-VLSI                                      |
        |   Tour 55-65, 2eme etage, Porte 13                               |
        |   Universite Pierre et Marie Curie (PARIS VI)                    |
        |   4, place Jussieu 75252 PARIS Cedex 05                          |
        |   FRANCE                                                         |
        | Fax                : 33 1 44 27 62 86 (direct)                   |
        | support e-mail     : cao-vlsi@masi.ibp.fr                        |
        | Users Mailing-list : alliance@masi.ibp.fr                        |
        | ftp site           : ftp.ibp.fr                                  |
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