
read_verilog counter.v
read_verilog -lib cmos_cells.v

proc;; memory;; techmap;;

dfflibmap -liberty cmos_cells.lib
abc -liberty cmos_cells.lib;;

# http://vlsiarch.ecen.okstate.edu/flows/MOSIS_SCMOS/latest/cadence/lib/tsmc025/signalstorm/osu025_stdcells.lib
# dfflibmap -liberty osu025_stdcells.lib
# abc -liberty osu025_stdcells.lib;;

write_verilog synth.v
write_spice -neg 0s -pos 1s synth.sp

