/*
 * AM65X_SR2 RM Info
 *
 * Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/
 *
 *  Redistribution and use in source and binary forms, with or without
 *  modification, are permitted provided that the following conditions
 *  are met:
 *
 *    Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 *
 *    Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the
 *    distribution.
 *
 *    Neither the name of Texas Instruments Incorporated nor the names of
 *    its contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

#include <tisci.h>
#include <socinfo.h>

struct ti_sci_rm_info am65x_sr2_rm_info[] = {
	{0x00C0, "RESASG_SUBTYPE_IR_OUTPUT"},
	{0x1840, "RESASG_SUBTYPE_IR_OUTPUT"},
	{0x1880, "RESASG_SUBTYPE_IR_OUTPUT"},
	{0x1900, "RESASG_SUBTYPE_IR_OUTPUT"},
	{0x2440, "RESASG_SUBTYPE_IR_OUTPUT"},
	{0x2700, "RESASG_SUBTYPE_IR_OUTPUT"},
	{0x2CCA, "RESASG_SUBTYPE_IA_VINT"},
	{0x2CCD, "RESASG_SUBTYPE_GLOBAL_EVENT_SEVT"},
	{0x2D0A, "RESASG_SUBTYPE_IA_VINT"},
	{0x2D0D, "RESASG_SUBTYPE_GLOBAL_EVENT_SEVT"},
	{0x2D4A, "RESASG_SUBTYPE_IA_VINT"},
	{0x2D4D, "RESASG_SUBTYPE_GLOBAL_EVENT_SEVT"},
	{0x2D80, "RESASG_SUBTYPE_IR_OUTPUT"},
	{0x2E40, "RESASG_SUBTYPE_PROXY_PROXIES"},
	{0x2EC0, "RESASG_SUBTYPE_RA_ERROR_OES"},
	{0x2EC1, "RESASG_SUBTYPE_RA_GP"},
	{0x2EC2, "RESASG_SUBTYPE_RA_UDMAP_RX"},
	{0x2EC3, "RESASG_SUBTYPE_RA_UDMAP_TX"},
	{0x2EC4, "RESASG_SUBTYPE_RA_UDMAP_TX_EXT"},
	{0x2EC5, "RESASG_SUBTYPE_RA_UDMAP_RX_H"},
	{0x2EC7, "RESASG_SUBTYPE_RA_UDMAP_TX_H"},
	{0x2ECA, "RESASG_SUBTYPE_RA_VIRTID"},
	{0x2ECB, "RESASG_SUBTYPE_RA_MONITORS"},
	{0x2F00, "RESASG_SUBTYPE_UDMAP_RX_FLOW_COMMON"},
	{0x2F01, "RESASG_SUBTYPE_UDMAP_INVALID_FLOW_OES"},
	{0x2F02, "RESASG_SUBTYPE_GLOBAL_EVENT_TRIGGER"},
	{0x2F03, "RESASG_SUBTYPE_UDMAP_GLOBAL_CONFIG"},
	{0x2F0A, "RESASG_SUBTYPE_UDMAP_RX_CHAN"},
	{0x2F0B, "RESASG_SUBTYPE_UDMAP_RX_HCHAN"},
	{0x2F0D, "RESASG_SUBTYPE_UDMAP_TX_CHAN"},
	{0x2F0E, "RESASG_SUBTYPE_UDMAP_TX_ECHAN"},
	{0x2F0F, "RESASG_SUBTYPE_UDMAP_TX_HCHAN"},
	{0x2F4A, "RESASG_SUBTYPE_IA_VINT"},
	{0x2F4D, "RESASG_SUBTYPE_GLOBAL_EVENT_SEVT"},
	{0x2F80, "RESASG_SUBTYPE_IR_OUTPUT"},
	{0x2FC0, "RESASG_SUBTYPE_PROXY_PROXIES"},
	{0x3080, "RESASG_SUBTYPE_UDMAP_RX_FLOW_COMMON"},
	{0x3081, "RESASG_SUBTYPE_UDMAP_INVALID_FLOW_OES"},
	{0x3082, "RESASG_SUBTYPE_GLOBAL_EVENT_TRIGGER"},
	{0x3083, "RESASG_SUBTYPE_UDMAP_GLOBAL_CONFIG"},
	{0x308A, "RESASG_SUBTYPE_UDMAP_RX_CHAN"},
	{0x308B, "RESASG_SUBTYPE_UDMAP_RX_HCHAN"},
	{0x308D, "RESASG_SUBTYPE_UDMAP_TX_CHAN"},
	{0x308F, "RESASG_SUBTYPE_UDMAP_TX_HCHAN"},
	{0x30C0, "RESASG_SUBTYPE_RA_ERROR_OES"},
	{0x30C1, "RESASG_SUBTYPE_RA_GP"},
	{0x30C2, "RESASG_SUBTYPE_RA_UDMAP_RX"},
	{0x30C3, "RESASG_SUBTYPE_RA_UDMAP_TX"},
	{0x30C5, "RESASG_SUBTYPE_RA_UDMAP_RX_H"},
	{0x30C7, "RESASG_SUBTYPE_RA_UDMAP_TX_H"},
	{0x30CA, "RESASG_SUBTYPE_RA_VIRTID"},
	{0x30CB, "RESASG_SUBTYPE_RA_MONITORS"},
};
